<?xml version="1.0" encoding="utf-8" ?> <rss version="2.0" xmlns:opensearch="http://a9.com/-/spec/opensearch/1.1/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:atom="http://www.w3.org/2005/Atom"> <channel> <title> <![CDATA[MUET Library &amp; Online Information Center, Jamshoro Search for 'su:&quot;VHDL Computer hardware description language&quot;']]> </title> <link> /cgi-bin/koha/opac-search.pl?q=ccl=su%3A%22VHDL%20Computer%20hardware%20description%20language%22&#38;sort_by=relevance&#38;format=rss </link> <atom:link rel="self" type="application/rss+xml" href="/cgi-bin/koha/opac-search.pl?q=ccl=su%3A%22VHDL%20Computer%20hardware%20description%20language%22&#38;sort_by=relevance&#38;format=rss"/> <description> <![CDATA[ Search results for 'su:&quot;VHDL Computer hardware description language&quot;' at MUET Library &amp; Online Information Center, Jamshoro]]> </description> <opensearch:totalResults>18</opensearch:totalResults> <opensearch:startIndex>0</opensearch:startIndex> <opensearch:itemsPerPage>50</opensearch:itemsPerPage> <atom:link rel="search" type="application/opensearchdescription+xml" href="/cgi-bin/koha/opac-search.pl?q=ccl=su%3A%22VHDL%20Computer%20hardware%20description%20language%22&#38;sort_by=relevance&#38;format=opensearchdescription"/> <opensearch:Query role="request" searchTerms="q%3Dccl%3Dsu%253A%2522VHDL%2520Computer%2520hardware%2520description%2520language%2522" startPage="" /> <item> <title> Modeling and simulation for RF system design / </title> <dc:identifier>ISBN:9780387275840 (hbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=8786</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0387275843.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Frevert, Ronny..<br /> Dordrecht : Springer, 2005 .<br /> xi, 291 p. : 25 cm. +.<br /> 9780387275840 (hbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=8786">Place hold on <em>Modeling and simulation for RF system design /</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=8786</guid> </item> <item> <title> The designer's guide to VHDL / </title> <dc:identifier>ISBN:9788131218556 (pbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=13214</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8131218554.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Ashenden, Peter J..<br /> New Delhi : Elsevier, 2008 9788131218556 (pbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=13214">Place hold on <em>The designer's guide to VHDL /</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=13214</guid> </item> <item> <title> VHDL for engineers / </title> <dc:identifier>ISBN:9788131727607 (pbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=13375</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8131727602.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Short, Kenneth L..<br /> New Jersey : Pearson Prentice Hall, 2009 .<br /> xxxii, 685 p. : 24 cm. .<br /> 9788131727607 (pbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=13375">Place hold on <em>VHDL for engineers /</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=13375</guid> </item> <item> <title> A VHDL primer / </title> <dc:identifier>ISBN:9788177582000 (pbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=13978</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8177582003.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Bhasker, Jayaram..<br /> New Delhi : Pearson, 2008 .<br /> 392 p. : 24 cm..<br /> 9788177582000 (pbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=13978">Place hold on <em>A VHDL primer /</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=13978</guid> </item> <item> <title> Verilog for digital design / </title> <dc:identifier>ISBN:9780470052624 (pbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=13991</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0470052627.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Vahid, Frank..<br /> Hoboken, N. J. : John Wiley, 2007 .<br /> xvi, 173 p. : 24 cm..<br /> 9780470052624 (pbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=13991">Place hold on <em>Verilog for digital design /</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=13991</guid> </item> <item> <title> Circuit design and simulation with VHDL / </title> <dc:identifier>ISBN:9788120343016 (hbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=14052</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8120343018.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Pedroni, Volnei A..<br /> Cambridge, Mass. : MIT Press, 2010 9788120343016 (hbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=14052">Place hold on <em>Circuit design and simulation with VHDL /</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=14052</guid> </item> <item> <title> FPGAs 101 : everything you need to know to get started / </title> <dc:identifier>ISBN:9781856177061 (pbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=14225</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/1856177068.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Smith, Gina R..<br /> Amsterdam : Elsevier/Newnes, 2010 .<br /> xvi, 229 p. : 24 cm..<br /> 9781856177061 (pbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=14225">Place hold on <em>FPGAs 101 :</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=14225</guid> </item> <item> <title> Digital electronics and design with VHDL / </title> <dc:identifier>ISBN:9788131216989 (pbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=16736</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8131216985.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Pedroni, Volnei A..<br /> Amsterdam : Elsevier, 2014 .<br /> xix, 679 p. : 24 cm..<br /> 9788131216989 (pbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=16736">Place hold on <em>Digital electronics and design with VHDL /</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=16736</guid> </item> <item> <title> Modeling and simulation for RF system design / </title> <dc:identifier>ISBN:9780387275840 (hbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=36300</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0387275843.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Frevert, Ronny..<br /> Dordrecht : Springer, 2005 .<br /> xi, 291 p. : 25 cm. +.<br /> 9780387275840 (hbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=36300">Place hold on <em>Modeling and simulation for RF system design /</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=36300</guid> </item> <item> <title> The designer's guide to VHDL / </title> <dc:identifier>ISBN:9788131218556 (pbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=40728</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8131218554.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Ashenden, Peter J..<br /> New Delhi : Elsevier, 2008 9788131218556 (pbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=40728">Place hold on <em>The designer's guide to VHDL /</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=40728</guid> </item> <item> <title> VHDL for engineers / </title> <dc:identifier>ISBN:9788131727607 (pbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=40889</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8131727602.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Short, Kenneth L..<br /> New Jersey : Pearson Prentice Hall, 2009 .<br /> xxxii, 685 p. : 24 cm. .<br /> 9788131727607 (pbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=40889">Place hold on <em>VHDL for engineers /</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=40889</guid> </item> <item> <title> A VHDL primer / </title> <dc:identifier>ISBN:9788177582000 (pbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=41492</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8177582003.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Bhasker, Jayaram..<br /> New Delhi : Pearson, 2008 .<br /> 392 p. : 24 cm..<br /> 9788177582000 (pbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=41492">Place hold on <em>A VHDL primer /</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=41492</guid> </item> <item> <title> Verilog for digital design / </title> <dc:identifier>ISBN:9780470052624 (pbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=41505</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0470052627.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Vahid, Frank..<br /> Hoboken, N. J. : John Wiley, 2007 .<br /> xvi, 173 p. : 24 cm..<br /> 9780470052624 (pbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=41505">Place hold on <em>Verilog for digital design /</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=41505</guid> </item> <item> <title> Circuit design and simulation with VHDL / </title> <dc:identifier>ISBN:9788120343016 (hbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=41566</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8120343018.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Pedroni, Volnei A..<br /> Cambridge, Mass. : MIT Press, 2010 9788120343016 (hbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=41566">Place hold on <em>Circuit design and simulation with VHDL /</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=41566</guid> </item> <item> <title> FPGAs 101 : everything you need to know to get started / </title> <dc:identifier>ISBN:9781856177061 (pbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=41739</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/1856177068.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Smith, Gina R..<br /> Amsterdam : Elsevier/Newnes, 2010 .<br /> xvi, 229 p. : 24 cm..<br /> 9781856177061 (pbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=41739">Place hold on <em>FPGAs 101 :</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=41739</guid> </item> <item> <title> Digital electronics and design with VHDL / </title> <dc:identifier>ISBN:9788131216989 (pbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=44250</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8131216985.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Pedroni, Volnei A..<br /> Amsterdam : Elsevier, 2014 .<br /> xix, 679 p. : 24 cm..<br /> 9788131216989 (pbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=44250">Place hold on <em>Digital electronics and design with VHDL /</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=44250</guid> </item> <item> <title> The designer's guide to VHDL / </title> <dc:identifier>ISBN:9788181471925 (pbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=54509</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/818147192X.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Ashenden, Peter J..<br /> New Delhi : Elsevier, 2004 .<br /> xxiii, 799p. ; 9788181471925 (pbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=54509">Place hold on <em>The designer's guide to VHDL /</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=54509</guid> </item> <item> <title> Circuit design and simulation with VHDL / </title> <dc:identifier>ISBN:9788120343016(pbk.)</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=54762</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8120343018.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Pedroni, Volnei A..<br /> New Delhi : PHI Learning, 2012 .<br /> xix, 608 p. : 24 cm..<br /> 9788120343016(pbk.) </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=54762">Place hold on <em>Circuit design and simulation with VHDL /</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=54762</guid> </item> </channel> </rss>
