| 000 | 00618cam a2200217 a 4500 | ||
|---|---|---|---|
| 001 | 16237815 | ||
| 005 | 20260430073315.0 | ||
| 008 | 100517s2010 pk ab bs 000 0 eng | ||
| 010 | _a 2010340933 | ||
| 020 | _a8177589180 (pbk.) | ||
| 050 | 0 | 0 |
_aHD9502.P1822 _bA45 2010 |
| 082 | 1 |
_a621.392 _bPAL |
|
| 100 | 1 | _aPalnitkar,Samir. | |
| 245 | 1 | 0 |
_aVerilog HDL : _bA Guide to Digital Design and Synthesis / _cSamir Palnitkar. |
| 250 | _a2nd ed. | ||
| 260 |
_aNew Delhi: _bPearson, _c2007. |
||
| 300 |
_aiix, 491 p. : _bill. ; _c24 cm. |
||
| 504 | _aIncludes Index. | ||
| 650 | 0 | _aVerilog. | |
| 650 | 0 | _aDigital Design. | |
| 999 |
_c54650 _d54650 |
||