FPGA based implementation & validation of histogram equalization algorithm MATLAB & HDL coder / Saba Maryam.

By: Contributor(s): Material type: TextTextPublication details: MUET, Jamshoro : Institute of Information and Communication Technology, 2018.Description: xvii, 102p.: ill; 29 CmSubject(s): DDC classification:
  • SAB
Item type: Theses Collection
Tags from this library: No tags from this library for this title. Log in to add tags.
Star ratings
    Average rating: 0.0 (0 votes)
Holdings
Item type Current library Collection Call number Materials specified Status Notes Date due Barcode
Theses Collection Theses Collection Multi-Media & Research Development Center IICT 1 Master TH-5329

Includes references & index.

There are no comments on this title.

to post a comment.
MUET Library & Online Information Center, Jamshoro, 2026. All rights reserved.
Implemented and Customized by Library Staff Email: liaquat.rahoo@admin.muet.edu.pk
Visitor Count: