FPGA based implementation & validation of histogram equalization algorithm MATLAB & HDL coder / Saba Maryam.

By: Contributor(s): Publication details: MUET, Jamshoro : Institute of Information and Communication Technology, 2018.Description: xvii, 102p.: ill; 29 CmSubject(s): DDC classification:
  • SAB
Item type: Theses Collection
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Includes references & index.

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