Scratchpad memory management mechanism for reconfigurable cache/spm multi-core processors / (Record no. 23559)

MARC details
000 -LEADER
fixed length control field 00478nam a2200145 4500
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Item number KAV
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Kavita Tabbassum.
245 ## - TITLE STATEMENT
Title Scratchpad memory management mechanism for reconfigurable cache/spm multi-core processors /
Statement of responsibility, etc Kavita Tabbassum.
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication MUET, Jamshoro:
Name of publisher Electronics Engineering, IICT,
Year of publication 2020.
300 ## - PHYSICAL DESCRIPTION
Number of Pages xviii, 101p.:
Other physical details ill, :29 cm.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Electronics Engineering
700 ## - ADDED ENTRY--PERSONAL NAME
Personal name Talpur, Shahnawaz.
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Theses Collection
Holdings
Inventory number Accession Number Price effective from Koha item type Shelf-Location Lost status Damaged status Not for loan Collection code Withdrawn status Permanent Location Current Location Date acquired
30-1-2025-th(46) TH-7271 01/17/2025 Theses Collection Master       IICT   Multi-Media & Research Development Center Multi-Media & Research Development Center 01/17/2025
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